A novel RISC-V architecture

A novel RISC-V architecture

X-Silicon aims to address the current limitations of edge computing through its new low-power "C-GPU" architecture.

San Diego-based startup X-Silicon recently announced the launch of a novel RISC-V architecture that combines CPU, GPU, and NPU into a single core. The new NanoTile architecture is described as a low-power "C-GPU," aggregating RISC-V vector CPU capabilities with GPU and AI/ML acceleration in a unique monolithic processor design.

X-Silicon claims that Nanotile is the first open-source architecture of its kind. It provides register-level access through a hardware abstraction layer (HAL), allowing OEMs and content providers to customize their drivers and applications for a wide range of hardware adaptability.

Under the NanoTile architecture

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The key to this architecture lies in its multi-core design, where multiple C-GPU cores are arranged on a chip and linked through an on-chip fast synthesizer structure. This setup dynamically aggregates the output of each core into a common buffer, thereby enhancing data processing for graphics, video processing, and artificial intelligence tasks. Compute RAM (C-RAM) is placed close to the processing cores and unified memory architecture, significantly reducing latency and improving overall computational efficiency.

X-Silicon states that its technology can address the limitations faced by existing GPUs. GPUs initially designed for gaming are now struggling to cope with new, diverse workloads such as artificial intelligence and parallel computing. Traditional GPU architectures are often inefficient due to fixed-function processing units and underutilization in non-gaming applications.In comparison, X-Silicon's C-GPU is designed to optimize performance for a broader range of applications by adopting a scalable, tile-based approach to efficient rendering and management of computations.

Open-source RISC-V CPU-GPU Hybrid

The open-source RISC-V CPU-GPU hybrid holds great promise in the computing industry.

By integrating CPU and GPU functionalities into a single RISC-V-based processor, NanoTile simplifies the hardware stack and reduces power consumption, making it suitable for applications in energy-sensitive environments such as mobile devices and embedded systems. The unified architecture also enhances performance by minimizing the latency typically associated with communication between separate CPU and GPU chips.

RISC-V ISA ensures a high degree of modularity and scalability, allowing users to customize the hybrid processor for specific applications. By offering the RISC-V CPU/GPU hybrid architecture under an open-source license, X-Silicon fosters a collaborative environment where developers, engineers, and researchers can contribute to and enhance the processor's design. This openness allows a broader community to experiment with and refine the technology, leading to faster progress and wider adoption. Consequently, X-Silicon's open-source RISC-V CPU/GPU hybrid can deliver more personalized and efficient computing solutions.

Cross-industry Flexibility

Supported by 14 patents for its innovative design, X-Silicon aims to leverage the massively parallel capabilities of RISC-V integrated with AI/ML and graphics to revolutionize edge computing. The company plans to offer new solutions to a wide range of industries, including wearable technology, AR/VR headsets, automotive displays, and more.The Impact of RISC-V on Technology and Innovation

The RISC-V standard itself is not a competitive advantage; the competition lies in the implementation. Much like USB, Ethernet, and Bluetooth, the RISC-V ISA is a publicly accessible standard that allows anyone to build their own solutions based on the RISC-V standard. RISC-V supports a broad ecosystem, both open and proprietary, enabling developers to freely create customized solutions for specific scenarios. Today, RISC-V continues to grow significantly. It has become the most prosperous and globally adopted non-proprietary ISA standard in history. Over 13 billion RISC-V cores have been shipped to date. An analysis report from SHD Group indicates that RISC-V SoC unit shipments are expected to soar to 16.2 billion units, with revenues reaching $92 billion by 2030.

RISC-V has garnered support from a global community. This community collaborates on technical standards, driving innovation and fostering a diverse ecosystem. The global community has contributed publicly available IP for creating shared extensions that can be used alongside the base ISA. All extensions are open and publicly accessible. Open collaboration allows companies and developers to work together, share ideas, and contribute to the development of the ISA and related extensions. Furthermore, RISC-V is a standard, not open-source code. The RISC-V ISA and extensions are approved and frozen through a robust community governance process. This modular approach of freezing the standard ISA and extensions allows for innovation while preventing fragmentation.

The public review of standards can enhance the robustness and resilience of cybersecurity. The openness of RISC-V promotes competition and encourages investment in new technologies. By allowing freedom in design, RISC-V offers the potential for innovation to everyone. No other architecture can offer this potential due to their proprietary licensing models that restrict innovation.

Nowadays, an increasing number of countries and regions are investing in RISC-V, viewing it as a pathway to build and develop a digital economy. RISC-V has become the foundation of the European Processor Initiative. The European Commission has provided substantial grants under the European Chips Act. At the same time, the EU is researching the importance of open software and hardware. The EU invests in the design capabilities of high-performance processing and new industry partnerships such as Quintauris. RISC-V is a standard ISA contributed to the public domain by American university laboratories funded by the U.S. industry. With the adoption and significant investment from numerous multinational corporations, universities, government agencies, startups, venture capital firms, and more, the momentum for RISC-V's development in the United States continues. China's industry, research, and academic communities have also contributed to the overall success of RISC-V, including many areas of global collaboration.

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